Motr  M0
common.c
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1 /* -*- C -*- */
2 /*
3  * Copyright (c) 2018-2020 Seagate Technology LLC and/or its Affiliates
4  *
5  * Licensed under the Apache License, Version 2.0 (the "License");
6  * you may not use this file except in compliance with the License.
7  * You may obtain a copy of the License at
8  *
9  * http://www.apache.org/licenses/LICENSE-2.0
10  *
11  * Unless required by applicable law or agreed to in writing, software
12  * distributed under the License is distributed on an "AS IS" BASIS,
13  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
14  * See the License for the specific language governing permissions and
15  * limitations under the License.
16  *
17  * For any questions about this software or licensing,
18  * please email opensource@seagate.com or cortx-questions@seagate.com.
19  *
20  */
21 
22 
23 #define M0_TRACE_SUBSYSTEM M0_TRACE_SUBSYS_ISCS
24 #include "lib/trace.h"
25 
26 #include "iscservice/ut/common.h"
27 #include "lib/memory.h"
28 
29 M0_INTERNAL void cc_block_init(struct cnc_cntrl_block *cc_block, size_t size,
30  void (*t_data_init)(void *, int))
31 {
32  int rc;
33  int i;
34 
35  M0_SET0(cc_block);
36  rc = m0_semaphore_init(&cc_block->ccb_barrier, THR_NR);
37  M0_UT_ASSERT(rc == 0);
38  for (i = 0; i < THR_NR; ++i) {
39  m0_semaphore_down(&cc_block->ccb_barrier);
40  cc_block->ccb_args[i].ta_data = m0_alloc(size);
41  M0_UT_ASSERT(cc_block->ccb_args[i].ta_data != NULL);
42  t_data_init(cc_block->ccb_args[i].ta_data, i);
43  cc_block->ccb_args[i].ta_barrier = &cc_block->ccb_barrier;
44  }
45 }
46 
47 M0_INTERNAL void cc_block_launch(struct cnc_cntrl_block *cc_block,
48  void (*t_op)(void *))
49 {
50  int i;
51  int rc;
52 
53  for (i = 0; i < THR_NR; ++i) {
54  rc = M0_THREAD_INIT(&cc_block->ccb_threads[i],
55  void *, NULL, t_op,
56  (void *)&cc_block->ccb_args[i], "isc_thrd");
57  M0_UT_ASSERT(rc == 0);
58  }
59  for (i = 0; i < THR_NR; ++i) {
60  m0_thread_join(&cc_block->ccb_threads[i]);
61  M0_UT_ASSERT(cc_block->ccb_args[i].ta_rc == 0);
62  m0_free(cc_block->ccb_args[i].ta_data);
63  }
64 }
65 
66 #undef M0_TRACE_SUBSYSTEM
67 
68 /*
69  * Local variables:
70  * c-indentation-style: "K&R"
71  * c-basic-offset: 8
72  * tab-width: 8
73  * fill-column: 80
74  * scroll-step: 1
75  * End:
76  */
77 /*
78  * vim: tabstop=8 shiftwidth=8 noexpandtab textwidth=80 nowrap
79  */
M0_INTERNAL void cc_block_launch(struct cnc_cntrl_block *cc_block, void(*t_op)(void *))
Definition: common.c:47
struct m0_thread ccb_threads[THR_NR]
Definition: common.h:42
#define NULL
Definition: misc.h:38
int m0_thread_join(struct m0_thread *q)
Definition: kthread.c:169
#define M0_THREAD_INIT(thread, TYPE, init, func, arg, namefmt,...)
Definition: thread.h:139
#define M0_SET0(obj)
Definition: misc.h:64
struct m0_semaphore * ta_barrier
Definition: common.h:37
int i
Definition: dir.c:1033
M0_INTERNAL int m0_semaphore_init(struct m0_semaphore *semaphore, unsigned value)
Definition: semaphore.c:38
void * m0_alloc(size_t size)
Definition: memory.c:126
int ta_rc
Definition: common.h:38
Definition: common.h:32
struct thr_args ccb_args[THR_NR]
Definition: common.h:44
m0_bcount_t size
Definition: di.c:39
void * ta_data
Definition: common.h:36
M0_INTERNAL void m0_semaphore_down(struct m0_semaphore *semaphore)
Definition: semaphore.c:49
void m0_free(void *data)
Definition: memory.c:146
int32_t rc
Definition: trigger_fop.h:47
#define M0_UT_ASSERT(a)
Definition: ut.h:46
M0_INTERNAL void cc_block_init(struct cnc_cntrl_block *cc_block, size_t size, void(*t_data_init)(void *, int))
Definition: common.c:29
struct m0_semaphore ccb_barrier
Definition: common.h:43