Motr  M0
atomic.h
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1 /* -*- C -*- */
2 /*
3  * Copyright (c) 2012-2020 Seagate Technology LLC and/or its Affiliates
4  *
5  * Licensed under the Apache License, Version 2.0 (the "License");
6  * you may not use this file except in compliance with the License.
7  * You may obtain a copy of the License at
8  *
9  * http://www.apache.org/licenses/LICENSE-2.0
10  *
11  * Unless required by applicable law or agreed to in writing, software
12  * distributed under the License is distributed on an "AS IS" BASIS,
13  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
14  * See the License for the specific language governing permissions and
15  * limitations under the License.
16  *
17  * For any questions about this software or licensing,
18  * please email opensource@seagate.com or cortx-questions@seagate.com.
19  *
20  */
21 
22 
23 #pragma once
24 
25 #ifndef __MOTR_LIB_ATOMIC_H__
26 #define __MOTR_LIB_ATOMIC_H__
27 
28 #include "motr/config.h" /* CONFIG_X86_64 CONFIG_AARCH64 */
29 #include "lib/assert.h"
30 #include "lib/types.h"
31 
32 #ifdef __KERNEL__
34 #else
35 # ifdef ENABLE_SYNC_ATOMIC
37 # elif defined (CONFIG_X86_64)
39 # elif defined (CONFIG_AARCH64)
41 # else
42 # error "Platform is not supported"
43 # endif
44 #endif
45 
46 
60 struct m0_atomic64;
61 
65 static inline void m0_atomic64_set(struct m0_atomic64 *a, int64_t num);
66 
70 static inline int64_t m0_atomic64_get(const struct m0_atomic64 *a);
71 
75 static inline void m0_atomic64_inc(struct m0_atomic64 *a);
76 
80 static inline void m0_atomic64_dec(struct m0_atomic64 *a);
81 
85 static inline void m0_atomic64_add(struct m0_atomic64 *a, int64_t num);
86 
90 static inline void m0_atomic64_sub(struct m0_atomic64 *a, int64_t num);
91 
95 static inline int64_t m0_atomic64_add_return(struct m0_atomic64 *a,
96  int64_t d);
97 
101 static inline int64_t m0_atomic64_sub_return(struct m0_atomic64 *a,
102  int64_t d);
103 
107 static inline bool m0_atomic64_inc_and_test(struct m0_atomic64 *a);
108 
112 static inline bool m0_atomic64_dec_and_test(struct m0_atomic64 *a);
113 
120 static inline bool m0_atomic64_cas(int64_t * loc, int64_t oldval,
121  int64_t newval);
122 
128 static inline bool m0_atomic64_cas_ptr(void **loc, void *oldval, void *newval)
129 {
130  M0_CASSERT(sizeof loc == sizeof(int64_t *));
131  M0_CASSERT(sizeof oldval == sizeof(int64_t));
132 
133  return m0_atomic64_cas((int64_t *)loc, (int64_t)oldval, (int64_t)newval);
134 }
135 
136 #define M0_ATOMIC64_CAS(loc, oldval, newval) \
137 ({ \
138  M0_CASSERT(__builtin_types_compatible_p(typeof(*(loc)), typeof(oldval))); \
139  M0_CASSERT(__builtin_types_compatible_p(typeof(oldval), typeof(newval))); \
140  m0_atomic64_cas_ptr((void **)(loc), oldval, newval); \
141 })
142 
146 static inline void m0_mb(void);
147 
150 /* __MOTR_LIB_ATOMIC_H__ */
151 #endif
152 /*
153  * Local variables:
154  * c-indentation-style: "K&R"
155  * c-basic-offset: 8
156  * tab-width: 8
157  * fill-column: 80
158  * scroll-step: 1
159  * End:
160  */
static void m0_atomic64_inc(struct m0_atomic64 *a)
static void m0_atomic64_sub(struct m0_atomic64 *a, int64_t num)
#define M0_CASSERT(cond)
static bool m0_atomic64_cas_ptr(void **loc, void *oldval, void *newval)
Definition: atomic.h:128
static int64_t m0_atomic64_sub_return(struct m0_atomic64 *a, int64_t d)
static bool m0_atomic64_inc_and_test(struct m0_atomic64 *a)
static void m0_atomic64_dec(struct m0_atomic64 *a)
static bool m0_atomic64_cas(int64_t *loc, int64_t oldval, int64_t newval)
static bool m0_atomic64_dec_and_test(struct m0_atomic64 *a)
static int64_t m0_atomic64_get(const struct m0_atomic64 *a)
static void m0_mb(void)
static void m0_atomic64_add(struct m0_atomic64 *a, int64_t num)
int num
Definition: bulk_if.c:54
static int64_t m0_atomic64_add_return(struct m0_atomic64 *a, int64_t d)
static void m0_atomic64_set(struct m0_atomic64 *a, int64_t num)